Summary: It introduce that the Companies produce in CYPRESS for main fact /since pairs of work pattern USB interface chip the performance and structures internals of SL811HS, provide SL811HS chip and expand the hardware circuit of U S B interface in the one-chip computer system, provide USB driver of this system and realize U a application program which read and write the function at the same time.

Keyword: SL811HS; USB interface; Driver; U One is read and written

A foreword

U S B common serial bus It is I N T E L, what companies such as D E C, M I – C R O S O F T, I B M,etc. jointly put forward, new interface technology that employs far and wide in the field of P C progressively in recent years. U S B commonability fine in interface and real-time character strong and transmission means various with low costs supporting, use simultaneously, not easy to expand and not usable, these advantages make it get favor of a lot of hardware manufacturers. Of different types the intersection of U S B and products pour into market in a large amount already at present, use in P C machine widely at the same time and in the embedded system.

That occupy key position is H o s t call the host computer too in the topological structure of U S B ,U S B data transmission must be initiated and controlled, can only set up the connection with the host computer with all U S B peripheral hardware by the host computer any time, whether can’t communicate directly during any of two pieces of peripheral hardware or between two host computers. And at present, the ones that act the host computer role are mostly PCs P C. U S B mobile devices that and we bought and used are all U S B peripheral hardware d e v i c e ,Such as digital camera in the interface of movement hard disk of U S B, U S B,etc.. All these apparatuses can only carry on file and data interchange on P C or by P C. Without P C, these apparatuses do not ” work ” point data interchange function .

51 serial one-chip computers have attracted a large number of Chinese users with its superior performance, ripe high dependability of technology, high cost performance, widely used to observe and control and automatic field. Realize U S B host computer interface with 51 serial one-chip computers, and then realize the control to having outside U S B, performance of controlling etc. has very great function to raising data storing, data transmission, apparatus of the whole system. This text uses the interface chip S L 811 H S of 51 serial one-chip computer W 78 E 54 and U S Bs to design the host computer interface of one U S B, can be realized to having the reading and writing and controlling of U one outside U S B through this interface, thus realize the data storage with enormous capacity * of the data collecting system of the one-chip computer.

Structure performance of 2 S L 811 H S

Whom the intersection of S L and 811 H S produce the intersection of C Y P R E S S and Company, can support full-speed U S B of data transmission control the chip? This chip adopt 28 foot P L C C and 48 foot T Q F P two kinds of encapsulation forms,and U S B main fact included inside /since controller, support it at full speed f u l l – s p e e d /Low-speed? l o w – s p e e d ? Data transmission, and can discern the low-speed or full-speed apparatus automatically. The interface that S L 811 H S offers complies with U S B 1. A standard, can link with microprocessor, little controller, D S P s, can also link with I S A, P C M C I A and other buses directly. Data interface and microprocessor of S L 811 H S carry on the interface and can offer 8 data I / O or two-way D M A passway, and can be by supporting D M A data transmission from the machine operation mode. In addition, can also link with standard microprocessors or little controllers of M o t o r o l a, I n t e l and other numerous types easily through stopping supporting. There is R A M of a 256 bytes within S L 811 H S, can be used as controlling the register or data bumper. Internal structural block diagram of S L 811 H S.

Hardware interface of 3 and little controllers

It is the connection circuit of 51 serial little controllers W 78 E 54 and S L 811 H S that Fig. 2 shows. In hardware of this design, it is 5 V because of the working voltage of 51 serial one-chip computer W 78 E 54 and components around selected for use, and the working voltage of S L 811 H S is 3 . 3 V, so the system should offer 5 V and 3 at the same time. 3 V power; Though S L 811 H S can use 12 M H z to shake brilliantly, finds in using the course actually, if it is not very good to shake quality brilliantly, circuit stability will be worse, so, recommend using 48 M H z to shake brilliantly while designing; Because what the break of S L 811 H S is asked for and exported is high level, need to use the reverse device to vary it into low level in order to meet W 78 E 54 to stop inputting the requirement; In addition, S L 811 H S reset by the low level; The power interface of its U S B socket should be flowed in 500 m A limit in order to protect the system too.

4 software design

U S B software design is divided into 2 parts, first, write U S B host computer controller driver to S L 811 H S chip; Second, adjust and finish U application program that a data read and wrote with driver systematically.

4 . A master controller drives and designs program

U S B apparatus driver is the key to developing U S B peripheral hardware, the complexity of U S B agreement has caused the variety of U S B driver content. This text only introduces the host computer and finishes U a data and reads and writes the main module that the function needs, including initialized module, enumerating the module, reading the module of byte, writing the module of byte, reading the module of buffering area, writing the module of buffering area,etc..

It is initialized module it is for setting up S L 811 H S main fact /since machine work pattern, at full speed or working ways, data buffering structure,etc.s internal low-speed; And it mainly means the host computer monitors a series of development produced between host computer and U plate while inserting of U one to enumerate. When enumerating and happening, the host computer sends out inquiring to ask automatically at first, U one responds this request, and send V e r d o r I D and P r o d u c t I D of the apparatus? Then the host computer loads the corresponding apparatus driver according to these two I Ds, in order to finish enumerating the course. Not only can be that U one presume the apparatus address through enumerating, but also can get U description table of an extreme point and U a support agreement, can the intersection of U and dish gone on and operated correctly according to the intersection of U and records of affiliated subdivision and agreement later.

In this system, the address space that S L 811 H S takes up is 0 x A 0 0 0 – 0 x B F F F, the reads and writes and adopts ” the automatic address increases the mode ” in the functioning of below To reduce the systematic resources that S L 811 H S take up while reading and writing the apparatus:

x d a t a u n s i g n e d c h a r S L 811 _A D D R _a t 0 x A 000 ;

//U S B host computer controls the register address

x d a t a u n s i g n e d c h a r S L 811 _D A T A _a t _ 0 x A 001 ;

//U S B host computer data base location

v o i d w r 811 u n s i g n e d c h a r a d d r e s s , u n s i g n e d c h a r v a l u e

{S L 811 _A D D R = a d d r e s s ;

S L 811 D A T A = v a l u e ; } ?

u n s i g n e d c h a r r d 811 u n s i g n e d c h a r a d d r e s s

{S L 811 _A D D R = a d d r e s s ;

r e t u r n S L 811 _D A T A ; }

The following is a code function of reading and writing the buffering area:

//a d d r = Initial skew address of buffering area

//s = Data indicator while reading and writing in the buffering area

//c = Quantity of data while reading and writing in the buffering area

v o i d S L 811 B u f R e a d u n s i g n e d c h a r a d d r , u n s i g n e d c h a r * s , u n s i g n e d c h a r c

{S L 811 _A D D R = a d d r ;

w h i l e c – -

{*s = S L 811 _D A T A ; }

}

v o i d S L 811 B u f W r i t e u n s i g n e d c h a r a d d r , u n s i g n e d c h a r * s , u n s i g n e d c h a r c

{S L 811 A D D R = a d d r ;

w h i l e c – -

{S L 811 _D A T A = *s ; }

}

4 . 2 employs and designs program

U S B bus generally includes four kinds of basic data transmission types: Control and transmit, stop transmitting, criticizing and transmitting and transmitting synchronously, what this system used is controlling and transmitting and criticizing 腀 to lose. Take patriot’s mini king U one as examples 這, recommend setting up the catalogue and concrete method to write file on this plate.

The patriot is a mini king 6 4 M Belong to M a s s s t o r a g e c l a s s, support B u l k – o n l y to transmit, order to collect and transmit the order collection as S C S me. When B u l k – O n l y transmit, it order and data and state convey through the intersection of B u l k and extreme point. The patriot is a mini king 6 4 M There are three extreme points, the extreme point 0 controls the passway in order to default, the extreme point 1 is B u l k o u t extreme point, the extreme point 2 is B u l k i n extreme point. Should be with r e a d read b l o c k 0 first And r e a d c a p a c i t y order, read the intersection of U and records of parameter, can the intersection of U and dish is gone on and read and written correctly subsequently.

Among them the value of d C B W S i g n a t u r e is 4 3 4 2 5 3 5 5 ?L S B ? ,Show that it is one C B W to send at present; Former state send H O S T to, may prove whom order carried out correct in the intersection of state and stage content of d C B W T a g; The byte to be conveyed is counted at d C B W D a t a T r a n s f e r L e n g t h stage for the data; Direction that stage convey of the data that B m C B W F l a g s indicates; R e – s e r v e d keeps the location, can usually put zero; B C B W L U N is used for pointing out which logic unit this order is conveyed to; BCBWCBLength, in order to order the length of the byte in the subsequent string, CBWCB is the order very about to convey. C B W order send out, U record analyze, appear C B in C B W and W C B then carry out corresponding operation, return one C S W order yuan later, show the order implementation. The patriot is a mini king 6 4 M Read or write into the 512 bytes at least each time, while rewriting some byte, must read once of whole logic piece, revise, at one time write into.

The working course of reading and writing U one through the way that W 78 E 54 controls S L 811 H S can be summarized briefly: After S L 811 H S measures from U S B bus until U one is inserted, notify this information the system by cutting off, the system can obtain various parameters related to transmitting this time through transferring and enumerating the module, and transfer the data and read and write the module and carry on corresponding operation with register of control on S L 811 H S and data register according to the concrete transmission parameter, the ones that finished to U one were read and written finally. It writes file flow diagram is shown in Fig. 3 and shown.

5 conclusions

The ones that used U S B host computer interface controller S L 811 H S to realize to U one were read and written, can offer a kind of common, solution conveniently and reliably for the fact that the high-capacity data of data collecting system are stored, this scheme has already been succeeded in applying to the environmental information of greenhouse that the author researches and develops independently and gathering at present, and proved its practicability and dependability through the test for a long time. Because there is S L 811 H S from machine work pattern at the same time, so, can also develop this scheme after revising briefly U S B interface from the apparatus, thus meet the needs of different occasions.